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Board Technical Information
FIGURE A-5:
COM2
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEGMENT CONFIGURATION FOR PIC18F85J90 DEVICES
COM1
SEG15
SEG14
SEG13
SEG12
SEG11
SEG10
SEG9
SEG8
SEG7
SEG6
SEG5
SEG29
SEG31
SEG44 (1)
SEG45 (1)
SEG46 (1)
SEG27 (2)
SEG28 (2)
SEG29
SEG30 (2)
SEG31
COM3
Legend:
Note 1:
2:
SEG4
SEG3
SEG2
SEG1
SEG0
COM0
N.C. = No connection
SEG44, SEG45, and SEG46 exist only on PIC18F85J90 devices.
Disable SEG27, SEG28, SEG30, and SEG32 when the LCD module is enabled. Although SEG32 is
not listed in the diagram, it is multiplexed with the Timer1 oscillator, and therefore, must be disabled
when the Timer1 oscillator is enabled.
? VL Electronics
TABLE A-6:
PIC18F85J90 PORT AND PIN COMPARISON
PIC18F85J90
Port
RA0
RA1
RA6
RA7
RB0
RB5
RB6
RB7
RC0
RC1
RC3
RC4
RC6
RC7
PIC18F85J90 PIN
AN0
SEG18
OSC2
OSC1
RB0
SEG29
RB6
RB7
T1OSC1
TIOSC0
SEG17
SEG16
TX/CK
RX/DT
ICE Pin
AN0
SEG18
OSC2
OSC1
RB0
SEG27
RB6
RB7
T1OSC0
TIOSC1
SEG17
SEG16
TX/CK
RX/DT
ICE Port
RA0
RF0
RA6
RA7
RB0
RG3
RB6
RB7
RC0
RC1
RA3
RA2
RC6
RC7
Legend:
Unshaded cells indicate a perfect match between the PIM and the glass.
Shaded cells indicate the pins that are remapped to the corresponding pin on the PIM.
? 2010 Microchip Technology Inc.
DS51662C-page 31
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